Can someone explain, why this is needed and why ARM is involved?
I understand the desire for standardization in the Chiplet space, but why is this something ARM is concerned about? Does the transition to Chiplets impact ISA?
I would have assumed it being transparent from a system architecture's perspective, a mere technical detail, nothing within ARM's scope.
Arm doesn't only do ISA. It essentially wrote the standards for the AMBA/AXI/ACE/CHI interconnect space. Standardizing chip-to-chip interconnects is very much in Arm's interests. It is a double edged sword though since Chiplets will likely enable fine grained modularity allowing IP from other vendors to be stitched around Arm (eg RISC-V IOMMU instead of Arm SMMUv3 etc).
The strange thing to me is why ARM, which is about chips with small area, where you don't need chiplets, cares.
If you do get involved with chiplets, which ARM says will be "because AI" (sigh), you need physical and logical interconnect standards, something ARM has been doing for a long time for SoC-internal connections: the AMBA bus standard.
More than the ISA, its the memory interconnect that require standardization. At SoC level, ARM is already a de-facto standard (ACE-Lite, CHI, ...), but its only a standard for communication inside a chip, to interconnect varius IPs.
I guess this standard aim to keep being a standard interconnect even in multi-chiplets system, to create/extend the whole ecosystem around ARM partners.
Can someone explain, why this is needed and why ARM is involved?
I understand the desire for standardization in the Chiplet space, but why is this something ARM is concerned about? Does the transition to Chiplets impact ISA? I would have assumed it being transparent from a system architecture's perspective, a mere technical detail, nothing within ARM's scope.
Arm doesn't only do ISA. It essentially wrote the standards for the AMBA/AXI/ACE/CHI interconnect space. Standardizing chip-to-chip interconnects is very much in Arm's interests. It is a double edged sword though since Chiplets will likely enable fine grained modularity allowing IP from other vendors to be stitched around Arm (eg RISC-V IOMMU instead of Arm SMMUv3 etc).
The strange thing to me is why ARM, which is about chips with small area, where you don't need chiplets, cares.
If you do get involved with chiplets, which ARM says will be "because AI" (sigh), you need physical and logical interconnect standards, something ARM has been doing for a long time for SoC-internal connections: the AMBA bus standard.
More than the ISA, its the memory interconnect that require standardization. At SoC level, ARM is already a de-facto standard (ACE-Lite, CHI, ...), but its only a standard for communication inside a chip, to interconnect varius IPs.
I guess this standard aim to keep being a standard interconnect even in multi-chiplets system, to create/extend the whole ecosystem around ARM partners.
I'm guessing but it may make it easier to sell CPU cores if you can sell physical dies instead of IP blocks.
Anyway, this is presumably no different than why Intel took an active role in the specification of what a motherboard looks like.